It is known to provide data processing systems with an active state and a sleep state. In the active state normal data processing operations are performed and normal supply voltage levels are used. When data processing operations are no longer required it is known to place the data processing apparatus into a sleep state. Within this sleep state various portions of the data processing apparatus may be powered down, or operated at different/reduced voltage levels in order to reduce the power consumption. In order to provide a rapid exit from the sleep state it is known to provide state retention circuits which store state values during the sleep mode such that the state values are locally available upon exiting the sleep mode so that processing may quickly resume within the active mode. One form of such state retention circuits are termed “balloon latches”. These balloon latches may be provided with their own supply voltage and formed so as to have characteristics desirable in lowering power consumption during the sleep mode (e.g. low leakage current).
As process geometries for forming integrated circuits become increasingly small (e.g. 35 nm and below), these circuits become increasingly vulnerable to soft errors, such as are caused by ionizing radiation. In order to increase resistance to such soft errors, it is normal to provide a generous margin in the supply voltage level to state retention circuits over the minimum required in order to increase their resistance to soft errors and the like. However, these generous margins in the supply voltage levels to the state retention circuits adversely increase the power consumption during sleep mode, such as by increasing leakage current.